Building a Custom Zynq-7000 SoC Development Board from the Ground Up - In this series of 23 YouTube videos [Rich] puts the AMD Zynq-7000 SoC through its ... - https://hackaday.com/2025/04/20/building-a-custom-zynq-7000-soc-development-board-from-the-ground-up/ #amdzynq-7000soc #fpgaboard #hardware #pcbhacks #fpga #arm

Do people just not use PLD or CPLDs anymore? I'm working on a project that they'd be kinda perfect for, but it seems like it's kind of a backwater. And, if people are still using them, what are the best (if there are any at all) open source toolchains?

Thanks!
(Boosts welcome)

After getting a basic ALU design done yesterday & starting a **very** rough start at a microcodeish thing, today the first design of the controlunit & overall cpu design comes together, so it can actually calculate an addition from two arbitary registers and store the result back into a register of choice! :3

Still a lot to go but excited it works already somewhat! #hardware #fantasyconsole #diy #verilog #systemverilog #software #cpudesign #hardwaredesign #fpga #fpgadev

Intel Sells Altera Business | Phoronix

｢ A decade after Intel acquired FPGA maker Altera for $16.7 billion and recently working to make Altera an independent company, Intel announced today it has sold 51% of its Altera business in a deal that values that business at $8.75 billion.

Intel announced today that Silver Lake will acquire 51% of the Altera business ｣

https://www.phoronix.com/news/Intel-Sells-51p-Altera

Homemade VNA Delivers High-Frequency Performance on a Budget - With vector network analyzers, the commercial offerings seem to come in two flavor... - https://hackaday.com/2025/04/16/homemade-vna-delivers-high-frequency-performance-on-a-budget/ #vectornetworkanalyzer #testequipment #toolhacks #fpga #adc #vna #rf

heise+ | Vom Messfühler zum smarten Sensor: Umfassende Studie zur Sensorentwicklung

70 Experten schildern den aktuellen Stand und die Zukunft der Sensortechnik: eine Fundgrube für Technikfreaks.

https://www.heise.de/hintergrund/Vom-Messfuehler-zum-smarten-Sensor-Umfassende-Studie-zur-Sensorentwicklung-10347645.html?wt_mc=sm.red.ho.mastodon.mastodon.md_beitraege.md_beitraege&utm_source=mastodon

W65C832 in an FPGA

Link: https://www.mikekohn.net/micro/w65c832_fpga.php
Discussion: https://news.ycombinator.com/item?id=43658417

I'm super happy that my latest chip Greyhound has been accepted for production!
It was designed with open source EDA tools and the IHP Open Source PDK.

Find out more here: https://github.com/mole99/greyhound-ihp

And down below

The Spade Hardware Description Language - Spade is an open-source hardware description language (HDL) developed at Linköping... - https://hackaday.com/2025/04/13/the-spade-hardware-description-language/ #hardwaredescriptionlanguage #spadelanguage #hardware #verilog #fpga #asic #vhdl #hdl

Pro tips when using Migen's SyncFIFO() module in your pipeline design...

I went from 70 MHz max frequency to 100+ MHz by just adding this parameter: `buffered=True`

It helped a lot for timing closure of the design :)

This isn't a new project, but it's new to me and very interesting. tiny-gpu, a Verilog implementation of a toy GPU.

https://github.com/adam-maj/tiny-gpu

New PCB rework!

This time instead of soldering on the track I used a short coil wire so the job is cleaner!

Applying the rework-fix on board #2 proved that board #1 io expander was burnt!

All (SPI+io expander) is good now on board #2 :)

BREAKING: Shure Axient Digital PSM has just won an NAB Best of Show Award in the MIX category!

(I did the FPGA design.)

#RC2014 Emulation for
#MiST and #SiDi #FPGA
available at
https://www.atari-forum.com/viewtopic.php?t=44842

Ordered an FPGA board with PCIe as I want to get some experience with that interface. Most are really expensive but I found an affordable Dragon board from KNJN. Let’s find out if it’s any good when it gets here.. #fpga #development

The PCB rework of this sunday afternoon :)

It went well!

FYI I don't have binocular nor a good soldering iron.

Had to scratch the track, unsolder the very small resistor, re-solder it on the track (from parallel to series).

It's a bit dirty I agree but it's done and it works!

Amstrad PCW is available for MiST too!

https://github.com/tdelage26/mist-binaries/tree/master/cores/AmstradPCW

Audio input fix for Maxduino virtual tape player on several cores on Sidi

-ABC80
-Apple IIe
-BBC Micro
-C16
-C64
-CoCo2
-eg2000
-Oric (core has been updated with latest commits too as previous one was from 2021)
-Sorcerer
-ZX48 (kyp069)
-ZX Spectrum

https://github.com/tdelage26/SiDi-FPGA

Triangle rasterisation is surprisingly complex. There are multiple approaches and decisions to make on which pixels to include. As part of testing my Earthrise #FPGA graphics engine, I've created visual tests to complement more automated testing.